1. Field of the Invention
The present invention relates to the fabrication of a casing for integrated circuits. More particularly, the present invention relates to the fabrication of a casing for mounting an integrated circuit chip from a lead frame which defines leads for electrically connecting pads of the chip to the outside of the casing.
2. Discussion of the Related Art
FIG. 1 is a partial top view of a conventional structure of a lead frame 1 for electrically connecting a chip to the exterior of a casing. FIG. 2 is a cross-sectional view of a casing for mounting an integrated circuit chip 2 with a lead frame 1 as represented in FIG. 1. The cross-section of FIG. 2 is taken along line A-A' of FIG. 1.
The lead frame 1 is formed by a frame 1' surrounding a central platform 3 for supporting a chip 2. Connection leads 4 extend from the frame 1' toward the platform 3 without contacting the platform. Various portions of the lead frame 1 interconnect the connection leads 4 to ensure a relative rigidity during mounting. The platform 3 is supported by support leads 4' which extend between the corners of the platform and the base frame 20'. The ends of conductive wires 5, which connect each connection lead 4 to one of the pads of the chip 2, are soldered to the connection leads 4. The assembly is encapsulated in an insulating resin 6 which defines the envelope of the casing. After encapsulation, the frame 1' and the short-circuits between the connection leads 4 are cut-out. The conductive wires 5 are generally gold. The resin 6 is generally an epoxy resin, and the lead frame 1 is generally copper or iron-nickel.
The lead frame 1 is generally fabricated by mechanical punching of a copper sheet. The lead frame may be fabricated by chemical etching (e.g., photo-litho-etching), but this process is not used for mass fabrication because it is long and more expensive.
A drawback of mechanical punching is that it needs a specific punching tool for each type of chip 2 because the size of the platform 3 is adapted to the particular size of the chip 2 to limit the length of the wires 5. Although punching is fast, and therefore has a good productivity, the fabrication of each punching tool is very expensive.
In some applications where the chip 2 dissipates a large amount of heat (e.g., in power circuits), a heat sink is added beneath the platform 3 either by bonding or soldering. A drawback encountered in such an application is the addition of thermal interfaces between the chip and the heat sink, which is detrimental to energy dissipation.
To eliminate the thermal interfaces, it has been proposed in the case of power circuits to eliminate the platform 3 and to directly bond the chip 2 on a heat sink playing the role of a platform. The heat sink is mounted beneath the connection leads 4 of the lead frame 1 through an insulating material placed at the periphery of the heat sink, facing the free ends of the connection leads 4 which are the nearest to the heat sink. A drawback of such a technique is that the glue needed to affix the insulating material to the connection leads 4 of the lead frame 1 can contaminate the electrical connections between the connection leads 4 and the chip 2, whereby a large number of casings are discarded during test processes.
In addition, in some cases, the chip 2 should be electrically insulated from the heat sink or from the platform. Then, an insulating layer is placed beneath the chip, which increases the number of thermal interfaces. In addition, the insulating layer and the glue needed for the bonding are generally organic and accumulate moisture. Excessive moisture may cause cracks in the resin 6 during its oven polymerization, or subsequently, when the casing is subjected to high temperatures (e.g., wave soldering or oven soldering of surface mounted components).